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Design Verification Engineer 

The job requires basic understanding of  functional verification of SOC/IP logic, test plan development, test bench and simulations. It also requires full coverage closure of the testing IP/SOC.

LOCATION

Gurugram

EMPLOYMENT TYPE

Permanent

What You’ll Do

  • Need to have good understanding  of concept related to functional  coverage. 

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  • Develops IP verification plans, test benches, and the verification environment based on the  specifications. 

 

  • Executes verification plans and defines and runs system simulation to verify the design, a and uncover bugs.  ​

  • Replicates, root causes, and debugs issues in the presilicon environment.  

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  • Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.  

Who You are

  • Bachelors / Masters in EE /ECE with 0-2 years of experience 

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  • Highly motivated and energetic with strong inclination to learn and grow. 

  • Experience in verification of design blocks (IP) and SoC components 

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  • Experience in system verilog, and/ OVM or UVM methodologies.  

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