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Senior Design Verification Engineer

This job requires you to perform functional verification of SOC/IP logic to ensure design will meet specification requirements starting from test plan to Coverage closure.

LOCATION

Gurugram

EMPLOYMENT TYPE

Permanent

What You’ll Do

  • Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. 

 

  • Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.  

  • Replicates, root causes, and debugs issues in the presilicon environment.  

  • Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.  

  • Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. 

 

  • Maintains and improves existing functional verification infrastructure and methodology. 

 

  • Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Who You are

  • Bachelors / Masters in EE /ECE with 3-5 years of experience 

  • Highly motivated and energetic with strong inclination to learn and grow. 

  • Experience in verification of design blocks (IP) and SoC components 

  • Experience in system verilog, and/ OVM or UVM methodologies.  

  • Experience in one/more of the following areas is a plus: Debug, Connectivity IPs and /or AMBA standards (OCP, AXI, AHB etc.) 

  • Knowledge of scripting, SV is a plus.

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